FReLU bias=False bug fix (#1666)

utils/activations.py

@@ -65,7 +65,7 @@ class MemoryEfficientMish(nn.Module):
 class FReLU(nn.Module):
     def __init__(self, c1, k=3):  # ch_in, kernel
         super().__init__()
-        self.conv = nn.Conv2d(c1, c1, k, 1, 1, groups=c1)
+        self.conv = nn.Conv2d(c1, c1, k, 1, 1, groups=c1, bias=False)
         self.bn = nn.BatchNorm2d(c1)
 
     def forward(self, x):